FPGA Capstone: Building FPGA Projects

FPGA Capstone: Building FPGA Projects

This course is part of FPGA Design for Embedded Systems Specialization

Instructor: Timothy Scherr

What you'll learn

Create a working FPGA design using Quartus Prime and run it on an evaluation board
Understand and practice all aspects of FPGA development, including conception, design, implementation, and debugging.
Create in the FPGA a working system on a chip design with Nios II soft processor, RAM and FLASH memory, and several peripherals.
Become familiar with the FGPA development flow, particularly in the case of a SoC with software development flow included.

Skills you'll gain

Leadership and Management

Details to know

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Assessments

4 assignments

Taught in English

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This course is part of the FPGA Design for Embedded Systems Specialization

When you enroll in this course, you'll also be enrolled in this Specialization.

Learn new concepts from industry experts
Gain a foundational understanding of a subject or tool
Develop job-relevant skills with hands-on projects
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There are 4 modules in this course

This course will give you hands-on FPGA design experience that uses all the concepts and skills you have developed up to now. You will need to purchase a DE10-Lite development kit. You will setup and test the MAX10 DE10-Lite board using the FPGA design tool Quartus Prime and the System Builder.

You will: Design and test a Binary Coded Decimal Adder. Design and test a PWM Circuit, with verification by simulation. Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design. Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer). Instantiate this design into a top-level DE10-Lite HDL file. Compile your completed hardware using Quartus Prime. Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse. Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Designer) and the SBT. Compile your completed software using the SBT. Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit. Record all your observations in a lab notebook pdf. Submit your project files and lab notebook for grading. This course consists of 4 modules, approximately 1 per week for 4 weeks. Each module will include an hour or less of video lectures, plus reading assignments, discussion prompts, and project assignment that involves creating hardware and/or software in the FPGA.

In this module you will begin your hands-on exploration of FPGA design by setting up a target board, the DE10-Lite based on the MAX10 Intel Altera FPGA. In this module you will  Setup and test the MAX10 board using the FPGA design tool Quartus Prime and the System Builder.  Design and test a Binary Coded Decimal Adder Record all your observations in a lab notebook pdf.  Submit your project files and lab notebook for grading. Completing this module will help prepare you for the work to be done in the modules that follow.

What's included

5 videos4 readings1 assignment6 programming assignments1 peer review1 discussion prompt

5 videosTotal 15 minutes

FPGA Capstone: Building FPGA Projects Course Introduction2 minutesPreview module
Capstone Project: Starting FPGA Design1 minute
Board Setup and Test1 minute
Expected Outcomes for Module 15 minutes
Tips for Success3 minutes

4 readingsTotal 70 minutes

How to Purchase the DE10-Lite Development Kit10 minutes
FPGA Captstone: Building FPGA Projects Assessment Strategy10 minutes
Module 1 Project Guide30 minutes
Lab Notebook Template20 minutes

1 assignmentTotal 30 minutes

Module 1 Quiz30 minutes

6 programming assignmentsTotal 390 minutes

Module 1 Project: Altera MAX10 Hardware Setup90 minutes
C4M1P160 minutes
C4M1P290 minutes
C4M1P360 minutes
C4M1P460 minutes
C4M1P530 minutes

1 peer reviewTotal 60 minutes

Module 1 Lab Notebook60 minutes

1 discussion promptTotal 10 minutes

Introduce Yourself10 minutes

The goal of this module is to develop a mixed-signal system. You will construct hardware that uses the Analog to Digital Converter (ADC) inputs and Pulse Width Modulate (PWM) outputs to make a voltage measuring instrument. In this module you will  Create a working design, using most aspects of the Quartus Prime Design Flow.  Design and test a PWM Circuit, with verification by simulation.  Design and test an ADC circuit, using Quartus Prime built-in tools to verify your circuit design.  Record all your observations in a lab notebook pdf.  Submit your project files and lab notebook for grading. Completing this module will help prepare you for the work to be done in the modules that follow.

What's included

2 videos1 reading1 assignment2 programming assignments1 peer review

2 videosTotal 4 minutes

Develop a Mixed Signal System1 minutePreview module
Target Outcome for Module 22 minutes

1 readingTotal 60 minutes

Module 2 Project Guide60 minutes

1 assignmentTotal 30 minutes

Module 2 Quiz30 minutes

2 programming assignmentsTotal 300 minutes

DE10litePWM120 minutes
DE10liteADC180 minutes

1 peer reviewTotal 60 minutes

Module 2 Lab Notebook60 minutes

The goal of this module is to develop the hardware for a System on a Chip (SoC). You will construct hardware that creates a NIOS II soft processor along with several interfaces to devices on the DE10-Lite development kit. In this module you will  Create a working design, using most aspects of the Quartus Prime Design Flow.  Create hardware for the NIOS II soft processor, including many interfaces, using Qsys (Platform Builder). Instantiate this design into a top-level DE10-Lite HDL file.  Compile your completed hardware using Quartus Prime.  Record all your observations in a lab notebook.  Submit your project files and lab notebook for grading. Completing this module will provide a platform for the work to be done in the module that follows.

What's included

2 videos1 reading1 assignment1 programming assignment1 peer review

The goal of this module is to develop the software for a System on a Chip (SoC). You will build software for a NIOS II soft processor you built in Module 3, using several interfaces to devices on the DE10-Lite development kit as well. In this module you will  Enhance and test a working design, using most aspects of the Quartus Prime Design Flow and the NIOS II Software Build Tools (SBT) for Eclipse.  Create software for the NIOS II soft processor, including many interfaces, using Qsys (Platform Builder) and the SBT.  Compile your completed software using the SBT.  Use Quartus Prime to program both the FPGA hardware configuration and software code in you DE10-Lite development kit. You will then test your new embedded system.  Record all your observations in a lab notebook pdf.  Submit your project files and lab notebook for grading. Completing this module will finish your work for this course.