- Computer Engineering
- Software Design
- Simulations
- Verification And Validation
- Test Automation
- Systems Design
- Computational Logic
- Hardware Architecture
- Embedded Systems
Hardware Description Languages for FPGA Design
Completed by JAMES ISAAC HARDIN
March 25, 2020
36 hours (approximately)
JAMES ISAAC HARDIN's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
