- Verification And Validation
- Software Design
- Computational Logic
- Embedded Systems
- Systems Design
- Test Automation
- Simulations
- Hardware Architecture
- Computer Engineering
Hardware Description Languages for FPGA Design
Completed by SUNEESH HARAN SUNIL
June 7, 2020
36 hours (approximately)
SUNEESH HARAN SUNIL's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
