- Systems Design
- Test Automation
- Software Design
- Simulations
- Computer Engineering
- Verification And Validation
- Hardware Architecture
- Computational Logic
- Embedded Systems
Hardware Description Languages for FPGA Design
Completed by PANDEY VIMAL KANT
June 5, 2020
36 hours (approximately)
PANDEY VIMAL KANT's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
