Hardware Description Languages for FPGA Design
Completed by NG WEI YET
January 1, 2021
36 hours (approximately)
NG WEI YET's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Simulations
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Hardware Design
- Category: Field-Programmable Gate Array (FPGA)
- Category: Application Specific Integrated Circuits
- Category: Verification And Validation
