Hardware Description Languages for FPGA Design
Completed by SHARATH CHANDRAN NAIR RAJENDRA
August 29, 2020
36 hours (approximately)
SHARATH CHANDRAN NAIR RAJENDRA's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Application Specific Integrated Circuits
- Category: Field-Programmable Gate Array (FPGA)
- Category: Hardware Design
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Simulations
- Category: Verification And Validation
