- Verification And Validation
- Embedded Systems
- Hardware Architecture
- Software Design
- Simulations
- Computer Engineering
- Systems Design
- Computational Logic
- Test Automation
Hardware Description Languages for FPGA Design
Completed by ABHAV S VELIDI
June 3, 2020
36 hours (approximately)
ABHAV S VELIDI's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
