- Hardware Architecture
- Embedded Systems
- Computer Engineering
- Systems Design
- Test Automation
- Simulations
- Computational Logic
- Verification And Validation
- Software Design
Hardware Description Languages for FPGA Design
Completed by Jogesh Singh
June 7, 2021
36 hours (approximately)
Jogesh Singh's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
