Hardware Description Languages for FPGA Design
Completed by VICTOR GOLDRIN
September 27, 2020
36 hours (approximately)
VICTOR GOLDRIN's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Verification And Validation
- Category: Programming Principles
- Category: Electrical and Computer Engineering
- Category: Computational Logic
- Category: Electronic Hardware
- Category: Electronics Engineering
- Category: Simulation and Simulation Software
- Category: Computer Programming
- Category: Test Tools
- Category: Application Specific Integrated Circuits
- Category: Test Case
- Category: System Design and Implementation
