Hardware Description Languages for FPGA Design
Completed by DMITRY LAPTEV
May 4, 2020
36 hours (approximately)
DMITRY LAPTEV's account is verified. Coursera certifies their successful completion of Hardware Description Languages for FPGA Design
What you will learn
Explain the role of HDLs in design entry and verification for FPGAs and ASICs
Utilize HDL software tools for FPGA development
Skills you will gain
- Category: Electronic Hardware
- Category: Computer Programming
- Category: Hardware Design
- Category: Simulations
- Category: Computational Logic
- Category: Electrical and Computer Engineering
- Category: Verification And Validation
- Category: Simulation and Simulation Software
- Category: Electronics
- Category: Test Tools
- Category: Debugging
- Category: Development Testing
